News Article

Crossed Swords Over SEMI Standards

Competition among SiC substrate manufacturers has boosted wafer diameters and eliminated micropipe defects in commercial SiC wafers. However, there is still some division over the effectiveness of the standards used to define the quality of the material, as Richard Stevenson discovers.

Intense competition between rival SiC substrate manufacturers has been good news for their customers. Wafer sizes are up and the micropipe defects that kill devices and hit yields have been cut to very low levels, with "zero micropipe" material now available. So does this mean that very-high-quality substrates are routinely available from a wide variety of suppliers?

Well, not according to several researchers speaking at the recent European Conference on SiC and Related Materials (ECSCRM) in Newcastle, UK. In their opinion, today s substrates contain high-density threading-screw dislocations, basal-plane dislocations and unwanted polytypes, and there is a huge variation in quality, not only between vendors but between many manufacturer s nominally identical substrates. These discrepancies are not exposed by the Semiconductor Equipment and Materials Institute (SEMI) specifications, which has led some researchers to claim that these standards need updating.

One of these researchers is Tom Ryan, from characterization equipment supplier Accent Optical Technologies, now part of Nanometrics. He and his colleagues have been assessing the quality of 2 and 3 inch 4H polytype substrates from seven different vendors. The team employed photoluminescence to identify electrically active defects and X-ray measurements that provide a metric for crystalline perfection. "The results blew us away," says Ryan. "These nominally identical wafers are so different."

Photoluminescence can distinguish between 4H and 6H material, and Ryan has also employed this method to identify boron-related defects. By altering the power density of the incident laser source he has produced whole-wafer maps that reveal 6H polytypes and stacking faults (see figure 1).

Ryan has also mapped smaller areas using a micro-photoluminescence tool that has a typical spatial resolution of 1 μm. By recording the intensity of the 4H band edge emission he has revealed lines that are associated with crystalline defects such as low-angle grain boundaries, threading dislocations and interfacial misfit locations (see figure 2).

Ryan s X-ray rocking curve studies involved whole-wafer mapping of the full-width half-maximum (FWHM) of an X-ray peak (see table 1). This value provides a measure of crystalline quality – perfect crystals have a theoretical FWHM approaching zero arc seconds, and this value increases through dislocations and grain boundaries that disrupt the lattice. The highest quality regions of the best SiC substrates have a rocking curve FWHM width of 14 arc seconds, which is only a little higher than that for typical silicon and GaAs material. However, even these SiC substrates have large regions with FWHM values of up to 100 arc seconds, where material is typically much more disordered.
Synchrotron measurements

Some of the defects responsible for this disorder have been identified by Patrick McNally from Dublin City University, along with colleagues at the University of Freiberg, Helsinki University of Technology, GE Global Research and the Institute for Synchrotron studies in Germany. Using a synchrotron source for X-ray analysis, the team investigated 2 and 3 inch substrates from five manufacturers and discovered what McNally described as "an alarmingly large variation in wafer quality" (see figure 3).

Although SiC substrate and chip manufacturers might be interested to see McNally s results, they are hardly likely to install an X-ray synchrotron instrument in their foundries. "It is not something that you re going to find in a company s backyard," says McNally. "It s a scientific tool." However, SiC manufacturers could replicate the technique with standard X-ray kit configured for Lang topography, which can map out whole substrates for different types of defect at a lower spatial resolution than the synchrotron.

Also at ECSCRM, James Oliver from Northrop Grumman Electronic Systems Advanced Technology Center presented the results from his survey of SiC substrates. He compared material from five vendors and found that variability in crystal quality is common, even within individual vendors. Although the best substrates are free of macroscopically observable defects, this is not the norm, according to Oliver. Polytype inclusions, low-angle grains, precipitates and strain can be seen in many substrates with the unaided eye using a cross-polarizer technique. Finer details can be gained using a cross-polarized light method and a microscope (see figure 4).

Oliver has also looked at substrate surface quality with an atomic force microscope. He believes that the surface roughness, which is typically less than 0.4 nm and at best 0.2 nm, is acceptable.

In addition to the studies comparing material from various vendors, Kurt Gaskill from the US Naval Research Laboratory in Washington, DC, presented the results of his investigation into 2 inch 4H-SiC substrates from Intrinsic, which is now part of Cree. Gaskill found large variations in the X-ray data and cross-polarization images of three substrates, which were off-cut at 4° towards (11–20) and had a micropipe density of 0–5 cm–2. There was little correlation between the X-ray and cross-polarization images, which led him to conclude that cross-polarized light images may not be sensitive to crystalline imperfections in high-quality, low-micropipe substrates.

Sub-standard SEMI standards?

Although the substrates studied by Ryan, McNally, Oliver and Gaskill have a very wide range of characteristics, they all conform to SEMI s specifications for 2 and 3 inch material. This is because the standard does not set a value for the micropipe density, which must be agreed between customer and supplier, and requires no tests based on X-ray diffraction or photoluminescence. Included in the SEMI standards are the substrate s dimensions, including warp and bow figures and off-axis angle tolerances. SEMI also defines limits for the number of visible defects and pits on the surfaces, the number of cracks in the material and the proportion of crystallite area.

Ryan is critical of these specifications: "SEMI standards lack state-of-the-art measurements and are too simplistic." Arnd-Dietrich Weber, the global task force manager for SEMI s SiC standardization committee and manager of test and metrology at substrate manufacturer SiCrystal, is not so sure: "It is known that if you look at the market – and the feedback from customers – that material from one vendor is not identical to that from a second vendor. But what is not clear at the moment is the impact of such variations on device production [and performance]."

Weber s is a point that all of the researchers agree with. In fact, many are now in the early stages of projects to find out whether there is a correlation between substrate quality and the performance of certain devices. Ryan and McNally both expect to find this link. Ryan believes that the non-4H inclusions – such as basal-plane dislocations, stacking faults and threading dislocations – increase the leakage current in Schottky diodes and will influence MOSFET yields. McNally thinks that the threading-screw dislocations will affect the performance of reverse-biased devices, like photodetectors. Gaskill, however, is less certain and does not want to speculate on the outcome of investigations relating current substrate quality and device performance.

Weber points out that research findings can also lead to claims that ignore the economics of substrate production. "You have two completely different worlds dealing with the same material. The papers at ECSCRM are very interesting, [but] the SEMI standards are the requirements needed for economic success."

The SEMI standards for SiC substrates were drawn up to reflect what is currently possible, explained Weber, and to provide a guideline that does not hamper future developments. He asserts that the SiC task force is not biased towards the material suppliers because it has representation from both these vendors and their customers. "It is a balanced composition that enables us to make good technical progress and produce a healthy document." Without this document every manufacturer could generate its own standard and substrate, which would be bad for both customers and the industry in general.

The current concerns for Weber s SiC task force are not the variations in substrate quality that are revealed by X-ray diffraction and photoluminescence, but agreeing a standard for 100 mm substrates and a method for counting micropipes. Substrate thickness has proved the sticking point for the 100 mm standard. Customers want thinner material to improve device performance, but vendors say that this could lead to problems associated with warp, bow and other geometrical features.

The micropipe counting issue is being addressed by another organization, the American Society for Testing and Materials (ASTM). "Without a standard in place it s impossible to compare the numbers published by different vendors directly," says Weber. This has led customers to request different micropipe densities from different known suppliers in order to ensure a consistent benchmark for incoming material. Unfortunately, good standardization is a very slow process, often taking five years. The ASTM committee has only been meeting for two years, so a universal method for micropipe counting will have to wait.
A manufacturer s perspective

SiCrystal s European sales manager Thomas Kippes offers the most pragmatic perspective. He believes that the key test for SiC quality is not the X-ray or the photoluminescence results, but whether the substrate provides a platform for high-yield manufacturing. He relates the story of a customer making Schottky diodes. The customer focused on X-ray diffraction maps, but observed no correlation with device yield. "Maybe it s a different story when you make a MOSFET," said Kippes, before pointing out that a customer s SiC experience and its individual process have to also be considered.

Today s SiC substrates are far from perfect and riddled with imperfections. But this may not matter. The pertinent question for device makers is "how good does my substrate need to be?"

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