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Hybrid chip improves GaN switch efficiency

Combining a MOSFET with a HEMT and adding a state-of-the-art gate electrode makes for a MOS-HEMT that ticks most of the performance boxes for GaN power electronics.

Rensselaer Polytechnic Institute (RPI) has moved its record-breaking GaN switches closer to challenging commercial silicon devices, by integrating different transistor types in the same chip.

At the International Symposium on Power Semiconductor Devices and ICs (ISPSD) in Orlando, Florida, on May 21, RPI s Weixiao Huang described hybrid GaN MOS-HEMT chips for power switching.

The Rensselaer team, in conjunction with Japanese power company Furukawa Electric, integrated MOSFET and HEMT epitaxial architectures in order to lower the on-resistance of their transistors. On-resistance is one of the major contributors to energy losses that occur during power switching.

Previously Huang s MOSFETs delivered record field-effect mobility of 167 cm2/Vs, but had an on-resistance over 100 mΩcm2. This on-resistance reached as high as 500 mΩcm2 for a MOSFET with a breakdown voltage of 1570 V.

By contrast, the on-resistance of the new MOS-HEMT is only 20 mΩcm2, while maintaining a 70 cm2/Vs field effect mobility. Huang says these devices will also be able to deliver breakdown voltages up to 1400 V.

The HEMT character of the chip is primarily responsible for the lower on-resistance, while the metal-oxide-semiconductor (MOS) structure means that the device remains normally-off.

Huang and his colleagues made the chip itself by growing a 300 nm undoped GaN layer on a sapphire substrate, followed by a 2.7 µm thick carbon-doped GaN layer. A 30 nm Al0.22Ga0.78N, layer finished off the GaN structure, before the team fabricated gate, source and drain electrodes and an interlayer dielectric.

The process that they used to produce the transistor s gate insulator is the key behind the field-effect mobilities that they can achieve. The RPI team uses silicon dioxide as the gate oxide, which is then covered in a layer of polysilicon.

“The main roadblock for GaN MOSFETs is high interface-state density at the insulator-GaN interface, like what happened before the commercialization of silicon MOSFETs,” Huang told compoundsemiconductor.net.

“Our GaN MOS process has achieved silicon/silicon dioxide-like interface properties.”

“The novel high-voltage MOS-gated FETS have shown impressive performance and have the potential to be much better than silicon and SiC MOSFETs.”

This work was done during Huang s graduate studies at Rensselaer, earning him a place as a finalist in the 2008 Lemelson-Rensselaer Student Prize competition that was won by Martin Schubert (see related story). He has now moved on to Freescale Semiconductor in Tempe, Arizona, where he is working on silicon smartMOS technology.

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