Aviza sees a bright spot in compounds

The global economy is slowing, and the west is already in a recessionary state – that much is obvious. Rising fuel and food prices, lower consumer confidence and job-security concerns have suppressed discretionary spending, and these same trends are putting pressure on the end markets served by our customers.

In the IC sector, the story is a mixed one. Total unit sales and average IC selling prices grew at double-digit percentages between the first halves of 2007 and 2008. However, in stark contrast, spending on equipment has felt the squeeze. SEMI s latest figures showed equipment bookings at a five-year low, following five straight months of rapid decline.

That IC units have continued to grow while capital equipment spending is in a slump suggests that equipment utilization is rising, and at some point new investments will need to be made. Industry analysts at Gartner and SEMI anticipate this turnaround in the second half of 2009, while cautioning that their data are heavily dependent on the impact of the current economic slowdown, and rely on access to finance through the battered capital markets.

From a distance then, an observer could be forgiven for concluding that the semiconductor equipment market is a bad place to be. But there are opportunities, both in silicon and III-Vs, and ultimately IC producers must invest if they are to remain competitive for the next growth cycle.

In the silicon world, one bright spot is advanced packaging: specifically three-dimensional chip stacking (3D-IC), where two or more die are stacked vertically and connected by through-silicon vias (TSVs).

The approach not only delivers a more compact package, it also improves performance because the vertical interconnects are shorter than horizontal global wires, cutting resistance-capacitance delays. And there is more to come – 3D-IC has the potential to stack dissimilar die, creating heterogenous "super-packages" containing memory, microprocessors, power devices, analog chips and more.

The first generation of 3D-IC is in volume production, and uses traditional wire bonding. However, research programs are developing a second-generation design where peripheral wire bonds are replaced with TSVs – channels that are made by etching through the middle of the die using plasma processes and then filled with conductors such as copper.

This technology is a classic example of an IC maker leveraging its core expertise in a new field, delivering growth despite the softness of capacity investment. But we see a different story in compound semiconductors – a market that is bucking the more widespread trend of cautious capital spending.

Five or six quiet years followed the heavy capacity additions of the communications technology bubble of 2000 and 2001, but now we see that capital spending by compound semiconductor makers is on the rise – and not just in the blooming high-brightness LED (HB-LED) sector.

Currently accounting for just 6% of total global semiconductor revenues, the compound market is nevertheless growing 50% faster than the overall semiconductor market, and its total revenues are expected to exceed $30 billion by 2012, according to BCC Research. If correct, this growth would represent a doubled market share of the total semiconductor industry in just five years.

What will drive this upsurge? The demand for GaAs-based RF integrated circuits will increase, thanks to growing shipments of mobile wireless devices, plus new, long-range wireless access architectures such as WiMAX. Wireless industry experts at ABI Research expect more than 1.3 billion mobile devices to ship in 2008. And despite the uncertainties of global economics, they say that growth will continue, largely driven by developing markets in Asia, South America and Africa.

Optoelectronic devices will also contribute strongly. BCC s report predicts double-digit growth of fiber-optic communications between now and 2012 to serve demand for broadband communications, while high-definition video applications like Blu-ray will fuel similar growth in optical data storage.

HB-LEDs provide perhaps the brightest application spot of all. Continued improvements in the luminous efficiency and color rendering of GaN-based white HB-LEDs, combined with lower manufacturing costs, will start to open up the general illumination market over the next 2–3 years, building on a sector already valued at more than $4 billion per year.

While technology is doubtless advancing, innovation in compound semiconductor IC processing has typically proceeded more slowly than its silicon affiliate – partly because substrate sizes have been limited to less than 200 mm, but also because performance benefits relate primarily to III-V material properties rather than raw device scaling. That said, the scaling of compound semiconductor devices does still enhance performance, and the need to reduce costs is now forcing device manufacturers to adopt some of the processing technologies that are more usually associated with silicon ICs.

Shrinking device-critical dimensions provides more than an increase in die per wafer: it improves device performance, increases fab yields and delivers a higher return on capital investment. The flip side is an added complexity in device interconnection, which requires an accompanying increase in the number of metal layers in wafer processing. This brings further challenges, with planarization processes needed to provide the surface flatness demanded by lithography depth of focus.

Aside from increasing the number of processing steps, the use of multi-level metal will also significantly increase material costs associated with the gold that is typically used as the interconnect metal in compound semiconductor ICs. To partially offset this cost increase, chip makers are beginning to incorporate the copper interconnect architectures that have long been favored by silicon IC fabs.

Device shrinkage also puts strain on the passive capacitor, a key part of most GaAs-based RFICs. More-aggressive design rules necessitate an increase in capacitance per unit area. While there is hope of addressing this by using thinner conventional materials such as PECVD SiN, reliability concerns will eventually force the introduction of higher "k" dielectric materials and, perhaps, the use of MOCVD or even ALD processes for dielectric deposition.

Device scaling also places greater demands on etch processes. Recessed gate technology is widely used as a method to reduce noise in GaAs-based transistors. This has traditionally been done using a wet-etching process. But because of the relative lack of critical dimension (CD) control, gate CD shrinkage eventually makes the use of wet etch impractical, and high-selectivity dry-etch processes must be developed.

So while the dark economic clouds have moved in and become a full-blown storm, in the semiconductor equipment world there is room for optimism, and this is particularly true within the compound semiconductor niche. Aviza is committed to supporting the smaller wafer platforms required by manufacturers, while for future needs we have considerable production experience with copper interconnects and high-k dielectrics – the technologies that compound semiconductor makers will soon need and which conventional tool suppliers to the niche may not be able to provide.   

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