Larger wafers can spur further growth of the LED industry

Today, the high-brightness LED market is enjoying its strongest boom since the market first emerged. After initially being used for mobile phone illumination, it is now appearing in the back light units (BLUs) required for notebook PCs and, more recently, it is being deployed in large area LCD TVs, which will shortly become the dominant application for the market. Furthermore, even the holy grail of lighting applications appears at long last to be becoming accessible, thanks to the rapid improvement of white LED efficacies.

The continuation of this success story, however, still requires significant improvements of LED cost (or, to be more precise, an improvement of cost per lumen). Consequently, LED manufacturing processes have to be continuously improved in order to reduce the production cost and related to that need, MOCVD development also has to focus on reducing the operating cost when growing LED structures.

Fig. 1: AIX 2800G4 HT reactor in 6x6-inch configuration

This cost reduction can be achieved by various means. One route is to develop MOCVD reactors that accommodate even more wafers of the same size, thus increasing the throughput. This is precisely what has been done in terms of reactor development since the early 1990s. As a result, each new reactor generation has been significantly larger than the previous one while the purchased cost has increased only moderately. However, there are some practical limitations to this scale-up process that encourage MOCVD reactor manufacturers to look for other, more intelligent ways, to reduce the LED production costs.

To understand the anticipated future development of the III-V industry - and in particular the LED part of it – it is helpful to take a look at the history of the silicon industry. In that industry larger and larger wafer sizes have played a crucial role in reducing the manufacturing cost of silicon devices and fundamentally this should be very similar in LED manufacturing.

What could be the benefits of moving to larger wafers in LED processes? First of all, using larger wafers in MOCVD reactors results in an increase in the usable wafer area per run. Looking at the typical geometry of an MOCVD reactor, it becomes obvious that a bigger part of the available reactor area can be better utilized when switching to large wafers. Furthermore, a relative reduction of the unusable edge area that has to be excluded from further processing is also achieved. The costly metal organics and hydrides would also be better utilized and finally all the subsequent process steps beyond the MOCVD process will enjoy improved yields.

The advantage of employing large wafers can be revealed with some simple calculations (Table 1). Looking at one of the MOCVD workhorses of the LED industry today, the AIXTRON 2800G4 HT, one may first calculate the total wafer area that can be loaded into the reactor (for the “standard” configuration of 42x2-inch wafers and the respective 4-inch and 6-inch configurations). In a second step, a certain amount of rim area (which is usually excluded from the usable area) is taken into account additionally. Finally, the gained usable area is calculated compared to the initial 42x2-inch configuration.

The potential result is impressive – 53% of the usable wafer area can be gained by simply moving to larger 6-inch wafers and most importantly – there is not a significantly high cost related to the conversion of a 2-inch reactor to a 4-inch or 6-inch configuration. Although the prices for 4-inch substrates today are now in an acceptable commercial range, the prices of 6-inch wafers are only just beginning to move downwards as the initial volumes begin to rise.

Looking at these economics, it may appear surprising that most of the GaN epitaxy is still performed on 2-inch sapphire wafers and indeed recently, many of the larger GaN LED manufacturers have started to convert their volume production over to 4-inch substrates when buying new systems for increased capacity.

Whereas we know that changing to 6-inch substrates clearly will be the next step for the industry, the decision to initiate this transition will depend on sufficient substrate availability and commercially viable prices. However, when that time arrives, the reactor technology needed is already there when customers decide to convert or buy 6-inch wafer configurations.

Fig.2: PL uniformity of a GaN/InGaN MQW grown in a 6x6-inch configuration. Standard deviation of wavelength is 1.2 nm

Table 1. The benefits of larger wafers

For those who do decide to convert; all that is required is a simple exchange of each of the six 7x2-inch satellite disks in a 42x2-inch configuration in a AIX 2800G4 HT over to 1x6-inch disks (Fig.1), converting the reactor to a 6x6-inch configuration.

Fig. 3: Thickness uniformity map of a GaN film on 200 mm sapphire substrate. Standard deviation of thickness is 1.9%
 

Theoretically, as the reactor geometry has not been changed, there is also a need to adjust or modify the process. When the conversion is complete, the process results are impressive. Uniformity levels are achieved that lead to significantly improved yield (see Fig. 2). Looking further ahead, 6-inch wafers might not be the final limit. Some early 200 mm sapphire substrates are already available today, and some initial studies into the MOCVD growth on such wafers have already been carried out.

Interestingly enough, MOCVD growth platforms for these much larger wafers do already exist. The CRIUS Close Coupled Showerhead Reactor is one of the widely used reactor types for LED manufacturing, and although today it is usually run in a 31x2-inch configuration, the geometry of this reactor can be easily converted into a single 200 mm or even a 300 mm setup. The 200 mm setup was used to perform GaN LED growth experiments. Thickness uniformity of less than 1.9% (std. deviation) was achieved on a 6-inch wafer (Fig 3; 6 mm rim excluded).

Delivering GaN processes on 200 mm substrates hints at another potential route to cost efficient manufacturing - the use of silicon substrates. Silicon is available at a much lower price level compared to sapphire, and is readily available at a commercially attractive price up to 300 mm in diameter. Consequently, GaN-on-silicon processes have been investigated for quite some time.

Although the target applications during the last few year were GaN based electronic devices rather than LEDs, in 2008, a partnership between IMEC (Belgium) and AIXTRON resulted in a successful demonstration of 200 mm GaN/AlGaN MOCVD growth on (111)-oriented silicon (reported at IWNS 2008).

To achieve this result, a variety of fundamental physical problems had to be overcome. GaN/Si wafers suffer from a significant mechanical strain that is caused by the lattice mismatch between substrate and epilayers, different thermal expansion coefficients and thermal gradients through the wafer.

This usually results in bowing, which is even more pronounced the larger the wafer size. The bowing effect can lead to non-uniform wafer temperatures during the growth process, which would inevitably result in nonuniform film properties.

Not all is lost though as there are ways to manage these issues. Key to this is the use of in-situ monitoring of the layer growth during the growth process, which then allows the adjustment of the layer structure and the process to minimize strain and bow.

 
Fig. 4: Temperature profile of a 200 mm GaN/AlGaN/Si wafer measured by ARGUS. The red dots indicate susceptor area without  wafer; the blue dots represent wafer area

The in-situ monitoring tool employed here was the ARGUS mapping system. In this device, a set of photo diodes monitors the light emitted from the wafer surface along the susceptor radius. As the susceptor rotates, a thermal image of the entire wafer surface (and the suceptor area beyond the wafer) is obtained (Fig. 4). This temperature map is finally used to optimize growth conditions.

The growth results clearly show that GaN/Si processes can be run in a stable and well controlled manner with excellent uniformities (e.g. thickness uniformity of GaN/Si √σ< 0.5 %). Theoretically, such processes could also be carried out on 300 mm silicon wafers in the same way; the only limitation up to now, is the fact that the required 111-oriented silicon substrates are not available yet.

In summary, switching to 4-inch and 6-inch GaN LED processes is the most immediately realistic opportunity to increase the productivity of HB-LED manufacturing. For MOCVD as the key manufacturing step, the technical risk and the cost related to the conversion to large wafers is very small. The availability of substrates and their cost are likely to be the key parameters that determine the speed of this conversion.

Employing silicon instead of sapphire is an interesting longer-term route to reduce manufacturing cost further, as complex processes on wafers up to 300 mm will become commercially feasible. However, a significant improvement in the efficacies (lm/W) of LEDs grown on silicon will be required to become competitive with established sapphire based LEDs.