News Article
EVG Installs Wafer Cleaning System for Research at University of Tokyo
The EVG301 system will enable void-free wafer bonding of III-V compound semiconductor materials on silicon wafers with high-quality surface preparation.
EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for MEMS, nanotechnology and semiconductor markets, has received an order from the University of Tokyo.
Its EVG301 megasonic wafer cleaning system will be used for compound semiconductor research. Installed at the university’s Takagi & Takenaka Laboratory, the new tool is focused on preparing a particle-free wafer surface for bonding III-V materials, such as gallium arsenide, indium phosphide, and indium gallium arsenide, (GaAs, InP, and InGaAs), to silicon wafers.
The system augments the laboratory’s research focused on developing novel semiconductor transistors incorporating compound semiconductor materials for large-scale integrated (LSI) devices to overcome limitations introduced with scaling beyond the 22-nm node using traditional silicon.
“The miniaturization of semiconductor devices is reaching its physical limitations, and traditional scaling in line with Moore’s law is not sufficient enough to address future demands for higher performing LSI devices,” noted Masafumi Yokoyama, Researcher at the Takagi & Takenaka Laboratory with the University of Tokyo. “As such, we have been evaluating new materials, such as III-V compounds, with silicon in effort to create new research breakthroughs that will address device performance demands in the post-scaling era. In support of our efforts, we adopted EV Group’s megasonic wafer cleaner, the EVG301, to help us achieve superior quality wafer bonds that are void-free.”
Commenting on today’s announcement, Yuichi Otsuka, Representative Director of EV Group Japan K.K., said, “We are pleased for this opportunity to support the University of Tokyo’s leading-edge LSI device research. The Takagi & Takenaka Laboratory is invested in a vital research area given the limitations the semiconductor industry faces with traditional scaling using silicon alone. We have always been a significant supporter of R&D work, which EV Group was founded upon, and continue to provide enabling technologies to advance innovation.”
To continue to meet consumer demands for lower power consuming, higher performing, and higher functioning chips, the semiconductor industry is evaluating the benefits of incorporating new materials with silicon—beyond pure silicon-based wafers. This shift is paving the way for future market growth of compound semiconductors, as well as more efficient manufacturing technologies to achieve maximum end-device performance.
For example, MOCVD processes, where a thin film of II-VI or III-V material is deposited by heteroepitaxial growth, can result in inconsistent wafer formation. This comprises the integrity of the wafer surface and ultimately impacts end-device performance. Wafer bonding is a promising solution to overcoming this problem. Essential to the wafer bonding integrity is the need for a particle-free bonding surface. Wafer cleaning is therefore critical to ensuring the wafer surface is free of any voids created by particles that can negatively impact the quality of the wafer bond and the overall wafer uniformity.
The University of Tokyo was established in 1877 as the first national university in Japan and is a leading research university.
EV Group (EVG) is a provider of wafer-processing solutions for semiconductor, MEMS and nanotechnology applications. Key products include wafer bonding, lithography/nanoimprint lithography (NIL) and metrology equipment, as well as photoresist coaters, cleaners and inspection systems.
EVG also holds a leading position in NIL and lithography for advanced packaging and MEMS. Along these lines, the company co-founded the EMC-3D consortium in 2006 to create and help drive implementation of a cost-effective through-silicon via (TSV) process for major ICs and MEMS/sensors. Other target semiconductor-related markets include silicon-on-insulator (SOI), compound semiconductor and silicon-based power-device solutions.
