Makers of smartphones and tablets place great importance on the efficiency of amplifiers because this governs battery life. WIN Semiconductors’ latest H2W process has been developed to address that need: It unites on a single die pHEMT featuring a very low insertion loss and a highly linear HBT, says the company’s Andy Tsai.

Go back a few years and you would have start up your computer to access the Internet. Today, however, you probably have other options at your disposal. If you just want to catch up on the latest sports results or find out whether it’s going to rain tomorrow, you can put your hand in your pocket and get out your smartphone. But if you want to watch a clip on YouTube or take a close look at your friend’s latest photos, you may well turn to your tablet.

These latest mobile devices, which offer the user mobile Internet and other multimedia services on the move, draw on far more data than previous generations of mobile phones. And in order for the owners of these laptops and smartphones to enjoy using this technology, downloading all this data must be fast. However, the electronics in the mobile devices must not only be capable of handling these fast data rates – it must also be efficient enough to allow them to operate for several hours between charges. 

Faster download requirements have been enabled by the owners of wireless infrastructure, who have constructed networks with greater bandwidth and higher data transfer rates, while makers of power amplifier MMICs have helped to reduce demands on battery life.

Most of time PAs operate at a fairly low power level, so the power added efficiency (PAE) can be relatively low. To combat this, in the last few years the makers of these amplifiers have unveiled two-state PAs, which increase efficiency when the device is operating at low and medium output powers. The technology to do this tends to be referred to as either a BiHEMT or BiFET process, and it involves the monolithic integration of HBTs and pHEMTs on a single die. The result is the combination of a PA and a switch.

With this technology it is possible to operate at high efficiencies far more often (see Figure 1). The input signal can be routed through the high-power path to deliver high efficiency at high power levels; and it can be directed through the low-power path to realize good efficiency at low powers.

Figure 1. Amplification is more efficient over a wider range of conditions when two amplifiers are used for high power mode and just one for low and medium power modes

At WIN Semiconductors Corporation of Taiwan we have been developing and refining our own BiHEMT process for uniting a HBT and a pHEMT on a single die. Specifically, our first-generation technology, which we unveiled at the CS Mantech conference held in 2007, involves the monolithic integration of InGaP/GaAs HBTs and E/D pHEMTs and uses a double-recess architecture and a bi-layer T-shape gate.

More recently, we have simplified our process, which in its latest guise incorporates just D-mode pHEMTs with HBTs. This makes good sense from a commercial perspective, because most BiHEMT applications for DC bias circuits and either RF or power-mode switches can be achieved with the pairing of D-mode pHEMTs and HBTs.

One of the strengths of our latest H2W process is that it trims the on-resistance of the pHEMT. In turn, this can lead to lower insertion loss and smaller layout area when the pHEMT performs as a power mode switch (as shown in Figure 1). The new generation H2W process is also very simple, requiring just 17 mask layers – five less than the previous H2W process, and just one more than we use for our stand-alone HBT technology. This means that our latest H2W process combines superior pHEMT characteristics for better RF switch performance with a simpler, better BiHEMT process for making products for producers of handsets and tablets.

Fabrication processes

MOCVD growth is employed for forming our epiwafers. They feature an InGaP layer to completely separate the pHEMTs from the HBTs, which form the upper section of the epitaxial stack. This isolation holds the key to independent optimization of both types of transistor. For example, by increasing the indium composition in the channel we have enhanced channel mobility, leading to a 40 percent reduction in on-resistance with the new generation H2W (PH50-20) process.

A cross-section of devices formed with this latest process is shown in Figure 2. Fabrication yields 2µm InGaP/GaAs HBTs and 0.5µm D-mode pHEMTs combined with epitaxial mesa resistors, thin film resistors, metal-insulator-metal (MIM) capacitors and through wafer vias. These BiHEMTs draw on our fourth generation HBT process, which includes two interconnection metal layers - Metal1 and Metal2 - and a thicker SiN dielectric sandwiched between them, which delivers improved mechanical and moisture protection.
Figure 2. The new generation H2W process requires just 17 mask layers, five less than the previous generation process

The Metal 1 layer is a 1 µm-thick film of evaporated gold, and plating of this metal creates a 4 µm-thick layer for Metal 2. MMIC designs that can be produced by us can also feature MIM capacitors with a capacitance of 570 pF/mm2, stacked MIM capacitors with a capacitance of 870 pF/mm2, thin-film resistors with sheet resistance of 50 Ohm/□ and an epitaxial mesa resistor with sheet resistance 175 Ohm/□.

We define the dimensions of our 0.5 µm gate with an i-line stepper and use a single layer photo resist. A single recess, followed by metal evaporation, forms the gate.

The biggest challenge that we have faced when developing our latest H2W technology is forming uniform 0.5 µm single and multiple gates for pHEMT devices around the HBT mesa. That’s because the HBT mesa has a height of over 1.5 µm. After fine-tuning gate photoresist thickness and the lithography process, the success that we have had in addressing this challenge is seen in the quality of a 0.5 µm full-periphery gate realized near the HBT transistors with high topology – there is no reduction in quality compared to our stand-alone pHEMT technology (see figure 3).


Figure 3. Scanning electron microscopy photos for new generation H2W show that pHEMT with 0.5 μm full-periphery gate can be realized near the HBT transistors with high topology

Device characteristics

HBTs produced with our PH50-20 process have a great set of characteristics. For example, the typical turn-on voltage is 1.265 V and DC current gain is 130 (see table 1 for more details). The cut-off frequency of this transistor is well above 30 GHz, so it can be widely used for constructing power amplifiers for Wireless LAN, UMTS and LTE standards.

The performance of the pHEMT is just as impressive as that of the HBT. Device characteristics of a 0.5 µm D-mode pHEMT produced with the PH50-20 process include a pinch-off voltage of -1V (Ids= 1mA/mm) and on-resistance of 1 Ohm.mm (see table 1 for details). Compared to the previous H2W technology, the latest version produces pHEMTs with a higher channel mobility, lower on-resistance, and a similar gate-drain breakdown voltage of about 18 V. The lower on-resistance stems from the move from a double recess process to a single one. The set of characteristics associated with the latest D-mode pHEMT fulfil the power handling requirements for RF switches.

Improvements in the pHEMT wrought with the new H2W process include a higher drive current; superior transconductance and on-resistance; and lower leakage currents in the channel and gate regions (see Figure 4).
Figure 4. pHEMTs produced by the new H2W process produce superior characteristics to those fabricated with the earlier H2W process. Comparisons of: (a) transfer curves, (b) I-V curves, (c) channel leakage currents, and (d) gate leakage currents

We characterised our RF switch using a single 9 x 125 µm device, 20 kΩ gate isolation resistors and a source-drain balance resistor. This revealed that the new H2W process reduced insertion loss compared to its predecessor, with losses falling from 0.15 dB to 0.1 dB. 

Testing of switch linearity showed excellent rejection of higher harmonics (see Figure 5), and the switching speed for pHEMTs produced with the PH50-20 process was just 1.5 µs. The results demonstrate that the pHEMT made with the PH50-20 process is suitable for low loss, high power and high linearity switch applications.

Figure 5. 80 dBc of second-harmonic and third-harmonic rejection ratios were obtained when device was biased at -3V

The great performance of these pHEMTs, and the HBTs that accompany them, demonstrate the high-quality of BiHEMTs produced by our new H2W process. The die that result are smaller than before, can be produced more quickly with a foundry process yield exceeding 95 percent, and they are very attractive candidates for making UMTS and LTE power amplifiers with excellent linearity and efficiency figures, which are needed for the latest smartphones and tablets.


Table 1. WIN’s latest H2W process produces HBTs and pHEMTs with a strong set of characteristics

The author thanks WIN’s team members who supported the measurements and process development.