News Article
III-Vs improve integrated circuit battery life tenfold
Early results using compound semiconductors and processes achieve a milestone towards low-power tunnel transistor electronics
Researchers have demonstrated that using new methods and materials for building integrated circuits can reduce power.
This extends battery life to 10 times longer for mobile applications compared to conventional transistors.
The consortium of researchers was composed of scientists from Rochester Institute of Technology (RIT), SEMATECH and Texas State University.
The key to the breakthrough is a tunnelling Field Effect Transistor (FET). The FET includes GaAs, In0.53Ga0.47As, InAs, InAs0.9Sb0.1/Al0.4Ga0.6Sb and InAs/GaSb.
Transistors are switches that control the movement of electrons through material to conduct the electrical currents needed to run circuits. Unlike standard transistors, which are like driving a car over a hill, the tunnelling FET is more like tunnelling through a hill, says Sean Rommel, associate professor of electrical and microelectronic engineering.
Sean Rommel
“The tunnelling field effect transistors have not yet demonstrated a sufficiently large drive current to make it a practical replacement for current transistor technology,” Rommel adds, “but this work conclusively established the largest tunnelling current ever experimentally demonstrated, answering a key question about the viability of tunnelling field effect transistor technology.”
Rommel worked with David Pawlik, Brian Romanczyk and Paul Thomas, three graduate students in the microelectronic engineering and microsystems engineering programs at RIT. Along with colleagues from SEMATECH and Texas State University, the team presented the breakthrough findings at the International Electron Devices Meeting in San Francisco this past December.
In order to accurately observe and quantify these current levels, a fabrication and testing procedure was performed at RIT. Pawlik developed a process to build and test vertical Esaki tunnel diodes smaller than 120 nanometres in diameter, Rommel explains.
This procedure allowed the researchers to measure hundreds of diodes per sample. Because of the nanometre-scale devices tested, the researchers were able to experimentally observe currents substantially larger than any previously reported tunnelling currents.
Esaki tunnel diodes, discovered in 1957 and the first quantum devices, were used to create a map showing output tunnel currents for a given set of material systems and parameters. For the first time, researchers have a single reference to which they can compare results from the micro- to the mega-ampere range, Rommel adds.
“This work may be used by others in designing higher performance tunnelling field effect transistors which may enable future low power integrated circuits for your mobile device,” he says.
The National Science Foundation, SEMATECH and RIT’s Office of the Vice President of Research sponsor the team's work.
“SEMATECH, RIT and Texas State have made a significant breakthrough in the basic materials for the sub 10 nm node with this work,” comments Paul Kirsch, director of SEMATECH’s Front End Processes. “The research that was presented at the International Electron Devices Meeting on III-V Esaki tunnel diode performance resolves fundamental questions on the viability of tunnelling field effect transistors and provides a practical basis for low-voltage transistor technologies.”
The team’s findings in the area of developing high performance, low-power electronic devices are also detailed in the paper, “Benchmarking and Improving III-V Esaki Diode Performance with a Record 2.2 MA cm2 Current Density to Enhance Tunnelling Field-Effect Transistor Drive Current.”
This extends battery life to 10 times longer for mobile applications compared to conventional transistors.
The consortium of researchers was composed of scientists from Rochester Institute of Technology (RIT), SEMATECH and Texas State University.
The key to the breakthrough is a tunnelling Field Effect Transistor (FET). The FET includes GaAs, In0.53Ga0.47As, InAs, InAs0.9Sb0.1/Al0.4Ga0.6Sb and InAs/GaSb.
Transistors are switches that control the movement of electrons through material to conduct the electrical currents needed to run circuits. Unlike standard transistors, which are like driving a car over a hill, the tunnelling FET is more like tunnelling through a hill, says Sean Rommel, associate professor of electrical and microelectronic engineering.
Sean Rommel
“The tunnelling field effect transistors have not yet demonstrated a sufficiently large drive current to make it a practical replacement for current transistor technology,” Rommel adds, “but this work conclusively established the largest tunnelling current ever experimentally demonstrated, answering a key question about the viability of tunnelling field effect transistor technology.”
Rommel worked with David Pawlik, Brian Romanczyk and Paul Thomas, three graduate students in the microelectronic engineering and microsystems engineering programs at RIT. Along with colleagues from SEMATECH and Texas State University, the team presented the breakthrough findings at the International Electron Devices Meeting in San Francisco this past December.
In order to accurately observe and quantify these current levels, a fabrication and testing procedure was performed at RIT. Pawlik developed a process to build and test vertical Esaki tunnel diodes smaller than 120 nanometres in diameter, Rommel explains.
This procedure allowed the researchers to measure hundreds of diodes per sample. Because of the nanometre-scale devices tested, the researchers were able to experimentally observe currents substantially larger than any previously reported tunnelling currents.
Esaki tunnel diodes, discovered in 1957 and the first quantum devices, were used to create a map showing output tunnel currents for a given set of material systems and parameters. For the first time, researchers have a single reference to which they can compare results from the micro- to the mega-ampere range, Rommel adds.
“This work may be used by others in designing higher performance tunnelling field effect transistors which may enable future low power integrated circuits for your mobile device,” he says.
The National Science Foundation, SEMATECH and RIT’s Office of the Vice President of Research sponsor the team's work.
“SEMATECH, RIT and Texas State have made a significant breakthrough in the basic materials for the sub 10 nm node with this work,” comments Paul Kirsch, director of SEMATECH’s Front End Processes. “The research that was presented at the International Electron Devices Meeting on III-V Esaki tunnel diode performance resolves fundamental questions on the viability of tunnelling field effect transistors and provides a practical basis for low-voltage transistor technologies.”
The team’s findings in the area of developing high performance, low-power electronic devices are also detailed in the paper, “Benchmarking and Improving III-V Esaki Diode Performance with a Record 2.2 MA cm2 Current Density to Enhance Tunnelling Field-Effect Transistor Drive Current.”
