Delivering efficient power conversion with package-free HEMTs
Back in the mid1970s, I was a graduate student working on GaAs – supposedly the material for superseding silicon in the world of semiconductor electronics. I learnt a great deal from that experience, including two important lessons that I have heeded my entire career: GaAs will never broadly replace silicon because it is fundamentally too costly; and energy efficiency can directly improve the global standard of living, because it can make everything more cost effective.
The shed where EPC first evaluated its enhancement mode GaN FETs
Based on these insights, after leaving Stanford University in 1977, I joined the silicon chipmaker International Rectifier, working on the development of power MOSFETs based on silicon. Back then, the writing was on the wall for the aging bipolar transistor, and power MOSFETs promised to set a new benchmark for high frequency, high-efficiency power conversion. I didn’t work on this on my own, but teamed up with a colleague from graduate school, Tom Herman – he shared my vision for the power MOSFET. We carried out some basic device development and were rewarded with a host of fundamental patents, which yielded significant royalties. I went on to pursue this technology for 30 years, and while I worked my way up through the company, I played my part in the growth of a market that is now worth tens of billions of dollars per year.
Eventually, however, it became clear that fundamental limits were starting to restrict the performance of the silicon MOSFET. Was this weakness now going to open the door to GaAs? No: By then there was a far more promising kid on the block – GaN.
Cross section of the EPC enhancement-mode GaN transistor
To exploit the full potential of this wide bandgap technology, I left my job as CEO of International Rectifier in 2007, and joined forces with Joe Cao and Robert Beach to found Efficient Power Conversion of El Segundo, CA. We set ourselves two goals: to be the first to develop an enhancement mode (normally off) transistor based on GaN grown on silicon; and to make a GaN transistor that costs less than the power MOSFET.
Initial funding for our venture came from a small investment from my mother, and a second infusion followed from our incredibly farsighted, patient partners in Taiwan. Teaming up with them has been incredibly beneficial, because they control a silicon foundry and they agreed to open its doors to our GaN-on-silicon wafers. Access to this line has held the key to us being able to achieve our goal of low cost.
We found it tough to succeed in our first quest, to develop an enhancement mode transistor. We began by building crude prototypes, using lab facilities at the University of California, Los Angeles, as well as the shed behind the house of our co-founder, Bob Beach. Performance of this device increased, and eventually reached a level where were able to move this process to our partners’ foundry in Taiwan. They had purchased a state-of-the-art MOCVD reactor that could be used to grow GaN-on-silicon starting materials. After many trials and errors – and long nights and weekends – we hit our first milestone, the fabrication of a lateral GaN HEMT capable of operating in enhancement mode. This development also led to the generation of many patent applications, some of which have started to issue after almost four years through the patent office.
An EPC 150 mm GaN-on-silicon wafer
Shooting for the sweet spot
Our primary target was the mid-voltage market – devices with blocking voltages of around 100 V, which could be used for audio amplifiers, DC-DC converters and UPS systems. We selected this sector because, although it was relatively small, it had a relatively high pricing structure compared with the market for devices operating at lower and higher voltages (below 40 V, or 600 V and above). Another attractive feature of this mid-voltage market is that customers place significant value on the high-frequency performance of GaN, so they are willing to pay a higher price for this wide bandgap device than they would be willing to do in a more commoditized market.
Our status as a start-up and our limited funding made it tricky to package our devices. We couldn’t partner with a large packaging subcontractor, because they did not want to be bothered by a small, risky customer.
In the end we decided to take a radical step, delivering our product without a package. Today all of our products are delivered in this manner, using a Land Grid Array (LGA) format with solder bars applied in wafer form. This approach may raise a few eyebrows, but it has been an unquestionable success. It doesn’t just allow us to make a big step towards our goal of making a product that is cheaper than a packaged power MOSFET (on average the cost of the power package is as much as that for the silicon inside) – it also enhances performance.
During my years involved in the manufacturing and selling of power devices at International Rectifier, I heard many customer complaints about the packaging of power devices, including concerns that they were too big, and they had too much internal resistance and inductance. In comparison, our LGA format delivers the absolute minimum package size and cost, and has attributes such as zero parasitic resistance and inductance (see figure 1).
Figure 1: EPC eGaN FETs are delivered in an LGA format as shown. Dimensions of this device are approximately 1.6mm x 4.1 mmIn
2009, we produced beta samples of our first product, the EPC1001. It outperformed all 100 V silicon-based devices in switching applications. We demonstrated its superiority over the incumbent technology by comparing the most common figure-of-merit for evaluating power MOSFETs: the product of the device on-resistance (RDS(ON)) and the overall gate charge (QG). The performance of this device is far higher than that of state-of-the-art silicon MOSFETs (see Figure 2).
Figure 2: Comparison between EPC’s first-generation eGaN FET and silicon power MOSFETs
Following several months of beta testing with customers, we made necessary adjustments and improvements to our device and launched our product line in March 2010. In order to distribute our product as widely as possible, and to get as much customer feedback as possible, we selected DigiKey as our global distribution partner. This allowed us to deliver product to designers overnight, at a reasonable cost. Several awards, including Electronic Products’ “Product of the Year” started to come in as acknowledgement of the advancement of the field by our GaN transistors.
Penetrating the market
At this stage, I drew on the lessons that I had learnt from the early days of the power MOSFET, and applied them to our eGaN FETs. I knew that the answers to four key questions controlled the adoption rate of a product based on a new technology: Does it enable new applications? Is it easy to use? Is it reliable? And is it cost effective?
To give our company the best possible chance of success, we organized ourselves to best address all four questions. We hired applications engineers and field applications engineers at the top of their professions, and we devoted as much time to reliability testing as product development. We also wrote papers and even a book, GaN Transistors for Efficient Power Conversion, to help engineers climb the learning curve and exploit the true potential of our devices. And we convinced National Semiconductor, now Texas Instruments, to develop driver ICs that would allow users to squeeze the maximum performance from our devices. New applications such as Wireless Power Transmission, Light Detection and Ranging, and Envelope Tracking fueled the early-adopter cycle.
It is now three years since we launched our first product, but from our perspective, it is clear that our work has only just begun. Although we have achieved our goal of making an extraordinary enhancement mode transistor, and we have expanded our offerings to transistors ranging from 40 V up to 200 V, we are still trying to make the lives of our designers easier. It is paramount to select the right board layout when using our eGaN FETs, because this enables the greatest improvements in switching performance, it limits device overshoot, and it takes advantage of low parasitic packaging. Our efforts in this direction have revealed that the optimal eGaN FET PCB layout design offers a five-fold increase in switching speed, plus a 40 percent reduction in voltage overshoot, compared to the 40 V silicon MOSFET benchmark.
We continue to trim the cost of making our devices, and we believe that in three-to-four years’ time, our eGaN FETs will be cheaper to make than their MOSFET counterparts. Our biggest challenge is to economically grow the epitaxial heterostructure on a silicon wafer, and we are being supported in this endeavor by the equipment industry.
An additional target for us is to expand our product range by developing higher voltage (600 V and above) enhancement mode FETs, as well as monolithic integrated circuits that include both driver circuits and power transistors. These developments will allow our GaN devices to effectively compete across 90 percent of the MOSFET, IGBT, and power IC markets.
Our overarching goal is to build a great new semiconductor company that enables efficient power conversion using GaN-on-silicon technology. We have been fortunate to attract outstanding professionals, as well as new graduates, willing to join a small startup that has embarked on a very big mission.
The early EPC team receiving Electronic Products’ “Product of the Year” award
Further reading:
A. Lidow et al.2012, GaN Transistors for Efficient Power Conversion, 1st Ed. Power Conversion Publications, El Segundo.
M. de Rooij et al. eGaN FET – Silicon Shoot-out 9: Wireless Power Converters Power Electronics Technology 38 (2012)
J. Strydom The eGaN FET-Silicon Power Shoot-Out Vol. 8: Envelope Tracking Power Electronics Technology 38 (2012)
D. Reusch, The eGaN FET-Silicon Power Shoot-Out Vol. 13: Optimal PCB Layout Power Electronics Technology 39 (2013)
