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US Researchers Show New Way Of Growing III-V Layers On Si

Ultra smooth GaAs films deposited on Si using graphene buffers 

UC Los Angeles (UCLA) researchers, in collaboration with colleagues at UC Irvine and UC Riverside, have come up with a new way of depositing smooth GaAs films on silicon substrates using graphene buffer layers in between.

According to the researchers, the compatibility of their growth technique with current silicon planar CMOS technology presents an important step towards integrating electronics and photonics on the same chip. Applications such as photonic networks on chip, optical transceivers, free-space laser communications, and microwave photonics could benefit.

Led by Kang L Wang, the Raytheon Professor of Electrical Engineering at UCLA and the study's principal investigator, the group showed that ultra-smooth and epitaxial GaAs thin films can be deposited successfully on a growth-assisting graphene layer, which functions as a lattice-mismatch/thermal-expansion-coefficient-relieving layer.

The approach involves depositing hetero-layered GaAs by molecular beam epitaxy on graphene/silicon at growth temperatures ranging from 350 to 600degC under a constant arsenic flux.

The low energy of the graphene surface and the GaAs/graphene interface is overcome through an optimised growth technique, which includes initiating the growth with a Ga prelayer at room temperature. This increases the wettability of the graphene surface, facilitating the nucleation process.

In addition to the effect of Ga prelayer, the growth rate was observed to have a significant effect on the surface morphology of GaAs. It turns out that a lower growth rate of GaAs yields a smoother surface. In this way, the researchers obtained an atomically smooth low-temperature GaAs nucleation layer.

A few experimental investigations have already been reported on the growth of GaAs nanowires on Si using graphene. Nanowire on graphene, according to the researchers, is technologically easier to realise than smooth GaAs on graphene. Nevertheless, successful operation of nanowire-based devices is impeded by carrier loss mechanisms, surface-state induced band bending, Fermi level pinning, poor ohmic contacts, and uncontrolled incorporation of n- and p-type dopants. These issues result in poor optoelectronic performance. In effect, nanowire-based devices have still has not turned out to be an alternative to its counterpart, smooth thin-film based devices.

The results, published in Advanced Functional Materials, suggest the UCLA technique can be applied to other light-emitting III-V semiconductors such as InP and GaSb on silicon.

The team has overcome several material-related challenges in this work. Most significantly, while conventional direct heteroepitaxial deposition of GaAs on silicon requires the growth of 1 µm thick GaAs to realise a certain material quality, the UCLA-led group's growth technique demonstrated that the same quality can be obtained by depositing only 25nm of GaAs on top of silicon.

The research was carried out in collaboration with King Abdulaziz City for Science and Technology (KACST) via the Center of Excellence for Green Nanotechnologies (CEGN). 

The work uses the Extreme Science and Engineering Discovery Environment (XSEDE), supported by the National Science Foundation. 'Towards van der Waals epitaxial growth of GaAs on Si using a graphene buffer layer' by Yazeed Alaskar et al, appeared in Adv. Funct. Mater. (2014);

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