POET Technologies and Synopsys to Collaborate
POET Technologies has announced a collaboration with Synopsys, a provider of chip design software, to develop an advanced model and first Process Design Kit (PDK) of POET's electrical devices (PET). The kit will target the 40nm technology node widely used for highly integrated systems-on-chip (SoC).
Through this collaboration, POET will use Synopsys' TCAD toolset and services for process technology development and design of nano-scale devices in POET's III-V compound semiconductor process. Devices include complementary HFET and HBT transistors with high electron mobility performance, including a thyristor with both optical and electrical operation. These devices will form the foundation of technology able to integrate active optical circuitry, lasers, modulators, filters, detectors and electrical circuitry on a single die.
"POET Technologies III-V process and devices IP represent a significant innovation for our industry, and we look forward to the opportunity to work with the POET team on their first PDK," said Terry Ma, VP of engineering for TCAD at Synopsys. "This collaboration with POET will combine the strengths of our TCAD modeling expertise and POET's innovative technologies to provide leading-edge semiconductor companies significant benefits for next-generation semiconductor designs."
The PET PDK and process offers lower cost and simpler process fab options for applications that do not require the full POET optical feature set. Due to the high mobility inherent in III-V materials, PET technology is predicted to deliver performance, which could be equivalent to three to four nodes ahead of mainstream technologies.
Further performance and novel capabilities will be enabled by the incorporation of in-plane optical intra and inter-chip signaling capabilities within the electrical technology. The PET/PDK is scheduled to be available at the end of Q4 2014 and will allow POET to provide detailed design information to industry fab partners and customers. This will enable pre-semiconductor design evaluation to integrate optical, analogue and digital functions together.