The technique of rapid thermal processing in compound semiconductor manufacturing provides extremely low thermal budgets and excellent temperature and ambient control capability. Hin Yiu Anthony Chung and Martin Drechsler of Mattson Thermal Products explain.

Thermal processing is a key manufacturing step in the compound semiconductor industry. Processes such as implant annealing, contact annealing and the activation of epilayers are all critical stages that directly influence device performance. These processes require a very repeatable and uniform temperature control as well as a precise process-gas control (ambient control). An ideal thermal process should also expose the wafer to the lowest possible thermal budget to prevent degradation. Rapid thermal processing (RTP) is a well established wafer-processing method in the silicon industry, which provides rapid throughput and excellent temperature and ambient control capabilities. Therefore RTP appears to be an ideal technique for the world of compound semiconductor manufacturing. Key features of an RTP system The cross-section of a state-of-the-art RTP process chamber (Mattson 2800CS) is shown in . The wafer is placed inside a graphite enclosure (labeled "graphite box") which prevents the outgassing of group V materials (e.g. arsenic) and cross-contamination between different processes. Linear halogen lamps located above, below and on the left and right sides of the graphite box generate infrared radiation, which is responsible for the heating. Temperature ramp rates of 30 C/s or above can be routinely achieved inside such an RTP process chamber. The process temperature measurement is carried out by a sophisticated pyrometer, which permits temperature measurements down to 200 C. Driven by market demand, device manufacturers are now moving from low-volume, small-scale production to high-volume mass production (see Compound Semiconductor August 2001, p69). In order to fulfill the requirement for mass-production environments, the RTP tool is based on a cassette-to-cassette concept where the handling of wafers is automatic (see ). Depending on the wafer size and the required throughput, the tool can also be upgraded to process simultaneously seven 2 inch wafers or three 3 inch wafers inside one graphite box. This feature is especially valuable for optoelectronic applications, where small wafer sizes (2 or 3 inches), thin wafers (around 100 m thick) and high throughput go hand in hand. Rapid thermal processes Implant annealing is one of the major processing steps in the manufacturing of GaAs MESFETs. The formation of a conducting channel in the MESFET is achieved by implanting GaAs with silicon atoms, followed by an annealing step. shows a typical curve of sheet resistance against annealing temperature for a GaAs wafer implanted by silicon atoms (10 keV, 1.7 1013/cm2). By using RTP (process duration: 30 s, ramp rate: 7 C/s), a much lower level of defect generation can be expected when compared with furnace annealing. Therefore, a higher implant activation can be achieved using RTP. Furthermore, owing to the lower thermal budget of the RTP process, less dopant out-diffusion can be expected (, p78). Another key criterion for a successful thermal-processing technique is the temperature uniformity. Excellent temperature uniformity, with a total range of less than 3 C, can be achieved by RTP across wafers that are up to 6 inches in diameter. Metal contact annealing is an essential processing step for achieving ohmic contacts in transistor devices like HEMTs or HBTs. By using RTP in contact annealing, state-of-the-art contact resistance can be achieved in typical p- and n-type metal stacks. The shows typical specific contact resistances obtained after RTP (processing temperature: 400 C, ramp rate: 15 C/s, process duration: 30 s). These values are low enough to provide the good ohmic contacts that are required for manufacturing high-performance HEMTs or HBTs. RTP also generates better morphologies on the metal surfaces. By applying RTP for contact alloying instead of using a furnace, a much smoother surface morphology can be obtained (). Modern electronic devices very often contain epitaxial multilayers that are either lattice-matched to the substrate or are pseudomorphic. Thermal treatments on such devices may initiate inter-diffusions between the multilayers, which in turn lead to degradation of the device performance. Therefore it is of great technical interest to investigate the effect of different thermal-treatment techniques on the hetero-interfaces of these devices. In this study pseudomorphic InGaAs layers embedded between two AlGaAs layers were annealed by either RTP (process temperature: 870 C, ramp rate: 20 C/s, process duration: 30 s) or by typical furnace processing. After the annealing, the samples were characterized by high-resolution x-ray diffraction, with the corresponding x-ray rocking curves shown in . Compared to the curve of the non-annealed sample, there is only a slight displacement of the diffraction peak of the InGaAs layer in the RTP sample. In contrast, the rocking curve of the furnace-annealed sample shows a great change in the diffraction pattern, indicating that a drastic inter-diffusion between the multilayers occurred. These results indicate that RTP creates less inter-diffusion at the hetero-interfaces of multilayer structures than furnace annealing. Conclusions The thermal-processing technique of RTP provides an extremely low thermal budget together with excellent temperature and ambient control capability. By using automatic RTP, excellent process results can be obtained under mass-production environments that can hardly be realized by furnace processes. We therefore believe that RTP is the tool of choice for thermal processing in compound semiconductor device manufacturing.