+44 (0)24 7671 8970
More publications     •     Advertise with us     •     Contact us
Technical Insight

Magazine Feature
This article was originally featured in the edition:
Volume 30 Issue 5

FETs: A mighty marriage


A monolithic architecture combines the complementary merits of GaN lateral heterojunctions and SiC vertical power devices.


The revolution in power electronics is well underway. Following decades of research and development, sales of SiC and GaN devices are now soaring, and will continue to climb for many years to come. Their commercialisation is creating a pair of multi-billion-dollar markets: GaN is now extensively deployed in consumer electronics, such as fast and compact chargers for the latest smartphones and laptops; and SiC is grabbing significant market share in photovoltaic inverters, as well as motor drives for electric vehicles.

Further development of GaN and SiC power electronics technologies will inevitably lead to intense competition between these two classes of device. It’s a battle that will be fought most fiercely in power range that spans 1 kW to 100 kW, due to the overlap of the power handling capabilities of GaN and SiC. While both are improving, due to efforts to increase the capability of the GaN and the SiC power transistor, is it possible that their marriage could deliver an even greater performance?

Friends or foes?
To answer this crucial question, let’s begin by taking a comparative look at the prevailing structures of the dominant GaN and SiC power devices, as summarised in Table 1. For this evaluation, it makes sense to consider the most popular GaN and SiC power devices, namely the GaN HEMT and the SiC power MOSFET (see Figure 1).

The GaN HEMT is a lateral device with small terminal capacitances. It is renowned for its high mobility, typically 2000 cm2 V-1 s-1, associated with the polarisation-induced two-dimensional electron gas (2DEG) at the AlGaN/GaN hetero-interface. The small capacitance and high mobility ensure that this device is very fast. To provide enhancement-mode operation to satisfy the fail-safe requirement, a non-negotiable in power electronics applications, this class of HEMT incorporates a p-type GaN gate. As well as enjoying volume adoption in compact fast chargers, this design is under intensive development for industrial and automotive applications.

In contrast to the GaN HEMT, the SiC MOSFET has a vertical geometry, leading to a relatively large conduction volume. It is possible to manufacture a variety of p-n junctions under the MOS channel using mature and robust ion-implantation and epitaxy techniques. These processes produce devices with a high blocking voltage and avalanche capability, traits that have garnered widespread deployment in high-power applications, such as electric vehicles and photovoltaic inverters.

However, while the GaN HEMT and the SiC MOSFET have had unquestionable market success, this should not obscure their issues. For both devices, the full potential is still to be unleashed.

One of the significant weaknesses of the lateral GaN HEMT is that scaling of the voltage rating compromises the bang-per-buck, due to an increased terminal spacing that occupies a larger area. Another issue is that this class of transistor has a small conduction volume, with the 2DEG channel just a few nanometres thick. The small conduction volume impedes the current handling and the thermal dissipation capacity compared with a vertical structure. In addition, there is the notorious ‘dynamic on-resistance’ issue, induced by the trap-rich surface and buffer, that involves an unwanted increase in the on-resistance with drain bias during the switching process. The other major weakness, arising from the lack of p-n junctions in the high-field region, is an absence of avalanche capability, with HEMTs potentially undergoing permanent degradation or failure following risky events, such as unclamped inductive switching and short-circuit events. To prevent this from happening, engineers increase the headroom for the breakdown voltage, adding to the bill of materials.

Table 1. Comparison between GaN HEMT, SiC MOSFET and GaN/SiC HyFET.

For SiC MOSFETs, by far their biggest weakness is the low mobility in the MOS channel. Values are typically below 20 cm2 V-1 s-1 in planar channels and less than 35 cm2 V-1 s-1 in trench channels – in both cases, mobility falls far short of that for electrons in the SiC bulk drift region, where it is typically between 800 cm2 V-1 s-1 and 1,000 cm2 V-1 s-1. In the channel, mobility is pegged back by the high-density of carbon-cluster traps at the interface of the gate oxide and SiC. The low mobility is responsible for the large channel resistance, which accounts for close to 50 percent of the total on-resistance of a 650 V device, and makes a significant and unwanted contribution to the specific on-resistance of devices – especially those with 650 V and 1200 V ratings.

However, rather than dwelling on the negatives, one should view the GaN HEMT and the SiC MOSFET as offering complementary merits. Incorporating them together to create a heterogeneous wide bandgap power device promises to provide a compelling solution that circumvents the issues just outlined.

Initial proposal
Back in 2016, our team at The Hong Kong University of Science and Technology (HKUST) first proposed the concept of the GaN/SiC hybrid FET, based on our numerical simulations. This device consists of a GaN-heterostructure-based 2DEG channel, a SiC JFET structure, a lightly doped SiC drift layer, and through-GaN-vias that connects the GaN channel and the SiC JFET (see Figure 1(c)). This design offers E-mode operation of the 2DEG channel by incorporating a recessed gate or a p-GaN gate.

When this device, which we refer to as a HyFET, is in its on-state, current flows through the n-SiC region in the JFET, the through-GaN-vias, and the GaN 2DEG channel. In the off-state, the high electric field from the drain is effectively blocked by the p-n junctions in the JFET structure, a state-of-affairs that ensures excellent protection for the high-mobility GaN 2DEG channel. Thanks to the p-n junctions in SiC, our HyFET should offer the same avalanche capability as the SiC power MOSFET.