Scaling N-polar GaN HEMT on Si to 8-inch
Researchers from Hubei Jiufengshan Laboratory (JFS Laboratory) have demonstrated the first 8-inch N-polar GaN HEMT on Si wafer with exceptionally smooth surfaces and high crystalline quality. By combining wafer bonding with polarity-controlled GaN structures, the team has created a scalable N-polar platform compatible with modern semiconductor manufacturing.
GaN HEMTs are now widely used in RF power electronics, including 5G base stations, radar systems and satellite communications. Nearly all commercial devices are built on Ga-polar GaN, which has become the standard platform for GaN electronics.
The opposite crystal orientation, N-polar GaN, offers attractive advantages for advanced device architectures. Reversing the polarisation direction can improve electron confinement, enable new transistor designs and potentially enhance high-frequency performance.
Despite these benefits, N-polar technology has struggled to move beyond laboratory research. The difficulty lies not only in wafer scaling, but also in achieving smooth surfaces and high crystalline quality, which are essential for reliable device fabrication. Demonstrating a large wafer with both characteristics therefore represents an important step toward practical N-polar electronics.
Producing high-quality N-polar GaN has historically been challenging. Compared with Ga-polar growth, N-polar epitaxy is more sensitive to surface chemistry and growth conditions, often leading to rough morphology or defect formation. As a result, most N-polar devices reported in the literature have been fabricated on relatively small substrates.
At the same time, the semiconductor industry has been moving toward 200 mm (8-inch) wafers to improve manufacturing efficiency. While Ga-polar GaN technologies have begun to adopt these wafer sizes, N-polar GaN has remained limited to much smaller substrates.
The team's work addresses this limitation by using wafer bonding and substrate transfer to create a large-area N-polar GaN platform compatible with 8-inch semiconductor processing.
In their approach, a GaN heterostructure designed for N-polar HEMT operation is first prepared and then bonded onto an 8-inch silicon wafer. After bonding, the original growth substrate is removed, leaving a thin N-polar GaN device layer supported by the large silicon platform. This process produces a wafer-scale N-polar surface with very low roughness and high crystalline quality, overcoming the limitations typically encountered in direct epitaxial growth.
This process produces a wafer-scale N-polar GaN structure suitable for device fabrication using standard semiconductor processing techniques. To validate the platform, they fabricated GaN HEMT devices on the transferred material and characterised their electrical performance. The devices exhibit strong channel conduction associated with the polarisation-induced two-dimensional electron gas, confirming that the transfer process preserves the electronic properties of the heterostructure.
With a wafer-scale N-polar platform now demonstrated, the next step is to further optimise epitaxy and device design. Improving uniformity across the wafer and refining transistor architectures could unlock the full potential of reversed-polarity GaN devices. Such developments may enable new generations of high-frequency electronics operating at mmwave and beyond.
Pictured above: (a) Photograph of a 200-mm N-polar GaN HEMT wafer. The red crosses denote the AFM scanning positions. The pattern on the surface is the reflection from the ceiling, and the ruler below is for reference. (b) The c-SAM image collected at the bonding interface. (c) Scanning TEM image of the N-polar GaN/AlGaN/GaN layer stack. (d)–(f) AFM height images collected at the three positions denoted by the red crosses in (a).
References
C. Li et al., APL Materials, vol. 14, 031107 (2026).
C. Li et al., RSC Advances, vol. 10, 43187–43192 (2020).
