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Technical Insight

Magazine Feature
This article was originally featured in the edition:
Volume 31 Issue 3

Improving GaN with a dash of oxygen

News

Depositing a partial monolayer of oxygen between a silicon substrate and GaN device layers trims defect density and improves material quality.

BY ROBERT MEARS FROM ATOMERA


Throughout the semiconductor industry, those working in R&D look to new materials to push the boundaries of technology, with a focus on enhancing performance and reducing power consumption. Progress on these fronts is imperative for developing the next generation of mobile devices, consumer electronics and data centres – all require devices that draw less power without compromising performance. These objectives may be meet by advancing devices made from silicon, but compound semiconductors such as GaN are beginning to play a role, particularly in enabling more-efficient power delivery

At Atomera, a semiconductor materials and technology licensing company based in California, we are supporting efforts to develop efficient, high-performance devices produced with a number of different materials with our novel epitaxial technology.

Initially, we developed a unique epitaxially grown silicon material technology, which we refer to as Mears Silicon Technology, or simply MST. We describe this epitaxial technology as ‘silicon with a twist.’ It’s variant on conventional silicon epitaxy, with the novelty being the interruption of growth at intervals, during which time there is the deposition of a partial monolayer of oxygen, or sometimes other elements. Crucially, the conditions for this deposition ensure that there are sufficient silicon atoms available on the surface to allow high-quality silicon epitaxy to continue.


Figure 1. Power versus switching frequency by device technology option and market segment.

Over the years, we have discovered that MST can be used to define a diffusion-blocking layer, enabling abrupt junctions and the shielding implants from point defects, which are the main source of dopant diffusion. By creating a thin undoped region that is maintained throughout the silicon manufacturing process, our growth technology enables the engineering of a variety of desirable transistor characteristics, including enhanced carrier mobility, reduced threshold voltage mismatch, and improved short-channel effects. It’s also possible to improve junctions and contacts with MST. What’s more, further benefits may be realised in some forms of scaled silicon devices, including reduced surface roughness scattering and improved wafer-level reliability metrics, such as bias temperature instability and time-dependent dielectric breakdown.

Recently, we have expanded the application of MST to a wider range of devices. It’s now applied to a variety of silicon technologies, from CMOS and DRAM to power and RF devices, and it’s also being used to improve the process for growing GaN on silicon.

We have been working on silicon power devices since 2016. Over that timeframe we have proven that our technology enables unique device-doping profiles. Key merits of the MST layer are the suppression of diffusion below the film, as well as localising doping in the vicinity of the film to enhance conduction.

Initially, we applied our MST technology to 5 V power devices, with our novel MST Smart Profile design used to produce an asymmetric device with higher localised shallow p-body doping. Thanks to this doping profile, these power devices combine an expanded safe-operating area with industry-leading values for the specific on-resistance as a function of breakdown voltage for a given silicon process node.

Over time we have extended the reach of our technology to designs covering the 7-48 V range. This work has involved additional doping profile engineering of the drift region. Such success has helped us to showcase the capability of our MST technology, which we licensed to STMicroelectronics in 2024 for its Smart Power products.


Figure 2. Growth of GaN power device market by market segment. Source: Power SiC & GaN Compound Semiconductor Market Monitor, Q1, 2024, Yole Intelligence.

From silicon to GaN

GaN technology, a newcomer compared with silicon, has matured considerably since its introduction into power devices. While yet to receive as much attention as SiC for high-voltage, high-power applications in the automotive and industrial sectors, GaN has inherent advantages over both silicon and SiC in terms of its high mobility – and hence its higher frequency. In addition, compared with silicon, it offers a markedly better on-resistance as a function of blocking voltage. Due to its superior efficiency at high frequencies, GaN is well-suited to deployment in DC-DC converters and various lower-power converters.

Today, the majority of sales of GaN devices are associated with fast-charging for consumer electronics. However, GaN could serve in many more applications, as these devices are capable of operating in units with power capabilities of up to tens of kilowatts, and frequencies from tens of kilohertz to tens of megahertz.

Helping to expand the opportunities for this wide bandgap semiconductor will be advances in GaN material growth quality, alongside a reduction in cost that could come from the introduction of 300 mm wafers. It’s anticipated that consumer electronics products, such as laptop chargers and mobile phone fast chargers, will continue to drive the majority of the demand for GaN, while increases in revenue will be driven by the automotive segment, with GaN a strong candidate for onboard chargers and ADAS systems.

Note, though, that the automotive market is not the only one that promises growth for GaN. Artificial intelligence and machine learning will benefit from GaN, as the GPU and memory processors in this high-performance compute application require high power.

When market analyst Yole Group considered all the opportunities for GaN, they forecast that annual revenue will total more than $2 billion by the end of this decade (see Figure 2).


Figure 3. GaN on MST on silicon (111).

Unlocking the potential of GaN

Our current licensing of MST is directed towards improving the electrical characteristics of a wide application space of silicon products, from power and RF through memory to the most-advanced logic nanosheet applications. So, what can MST offer GaN? In short, a more compliant lattice for the growth of lower-defectivity GaN-on-silicon (see Figure 3). In this sense, MST offers chemical and mechanical advantages, as opposed to the previously characterised electrical benefits.

In our early days, we devoted much effort to the fundamental ab initio modelling of the inserted partial monolayers of oxygen in the silicon lattice, as well as detailed experimental characterisation. Back then we often considered a ball-and-stick model, with a silicon-silicon bond bending to enable a stable Si-O-Si bond that retained the silicon lattice. As oxygen is introduced, the stability of the overall structure increases via the proximity of adjacent oxygen. We discovered that over a characterised temperature range, stability improves with oxygen density, according to a power law with a factor of roughly 2.5.

Another insight from this work is that due to the electronegativity of oxygen, charge transfer occurs from adjacent silicon atoms. Due to this, next-nearest silicon neighbours have a smaller opposite charge, and the charge spatial ‘wave’ dissipates over about four atomic spacings. Related to this is a local distortion of the lattice to accommodate oxygen, again with dissipation over about four atomic spacings.

According to our theoretical simulations, this modified silicon lattice is better at accommodating lattice mismatch. This observation provided our starting point for virtual substrate work and, in particular, our development of GaN-on-silicon technology.


Figure 4. Defect reduction using MST. Same epi recipe and cross-sectional transmission electron microscopy imaging conditions for both samples.

Growth on silicon

The conventional growth of GaN-on-silicon begins by taking (111) orientated silicon wafers with nominally zero-degree off-cut and loading them into a reactor for epitaxial growth. In contrast, silicon epitaxy for electronic applications typically involves (100) orientated wafers with a 4 ° offcut.

Removing the off-cut presented us with a challenge. Based on conventional epi wisdom, zero-degree growth is too slow and can be defective. Addressing these issues has taken some time, but we have been able to overcome these challenges and apply our MST technology to silicon (111) substrates.

Assisting us in this endeavour, in late 2023 we started to engage with Wayne Johnson, a veteran in GaN technology. Johnson had previously worked at Nitronix, a pioneer in the GaN space, before working for Kopin and then IQE. Through Johnson, we were introduced to another GaN pioneer, the academic Edwin Piner of Texas State University. These introductions led us to sponsor a programme at Texas State University to grow baseline GaN HEMT material.

The first phase of this project focused on the physical characterisation of GaN grown on MST substrates. For this investigation, Piner’s team compared results with their stable process-of-record GaN baseline stack, consisting of AlN buffer layers followed by GaN of around 2 µm thickness, a heterostructure suitable for RF applications. For the first phase dataset, the process-of-record recipe was kept constant, and various MST structures were grown to start to explore how our technology interacts with the baseline. To everyone’s delight, the first set of wafers showed very promising results.

This promise is clear in side-by-side transmission electron microscopy images, comparing the process-of-record GaN-on-silicon stack with the same stack on the MST (111) wafers. Images at the microscopic level reveal that the MST wafers have fewer defects, both in the AlN buffer and in the top GaN layer.

While the transmission electron microscopy images are encouraging, they have the potential to mislead, because they only consider a very small region. To cater for this concern, we turned to X-ray diffraction to examine crystal quality, considering the width of the diffracted beam.

The benchmark for this is the X-ray diffraction spectra from the process-of-record GaN-on-silicon stack produced by Piner and his co-workers that’s been characterised over a number of years. Diffraction peaks from this material, considering the (002) and (114) diffraction directions, have typical values for the full-width at half-maximum of 650 +/-30 arcsec. Such values are considered to be good for industry-grade 2 µm GaN.

X-ray diffraction spectra for the MST design has confirmed the promise provided by transmission electron microscopy. X-ray diffraction peaks for the (002) and (114) directions are narrower (see Figure 5), with different trends observed in the composition and spacing of the MST layers.



Figure 5. Example of X-ray diffraction (XRD) full-width at half-maximum (FWHM) improvement with MST.

Collaborating with Sandia Labs

Recently, we announced a collaboration with Sandia National Labs – a Department of Energy, Office of Science, Nanoscale Science Research Center – with this partner performing electrical tests on our MST-supplied silicon (111) substrates, with GaN epilayers grown at Texas State University. The purpose of this project is to validate MST’s mechanical and electrical benefits for GaN-on-silicon epiwafers. This effort will build upon improvements already observed at the materials level in GaN/MST-on-silicon wafers.

While GaN is helping to usher in a new era of electronics, challenges persist. However, many of them can be addressed by leveraging our innovations in material science, which open the door to even higher efficiencies, greater power handling, and enhanced stability. Such gains will help to enable electrification in many fields. By providing a cost-effective alternative to SiC, our MST technology is expanding the limits of GaN
chip performance.








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